HMP112F7EFR8C-Y5N3 Datasheet - Hynix

HMP112F7EFR8C-Y5N3 240pin Fully Buffered DDR2 SDRAM DIMMs

and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2 / Sep. 2008 1 Free Datasheet http://www.datasheet4u.com/ 1240pin Fully Buffered DDR2 SDRAM DIMMs ORDERING INFORMATION Part Name HM.

HMP112F7EFR8C-Y5N3 Features

* novel architecture including the Advanced Memory Buffer that isolates the DDR2 SDRAMs from the channel. This single component located in the front side center of each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the host controller and the DDR2 SDRAMs

HMP112F7EFR8C-Y5N3_Hynix.pdf