HMP112S6EFR6C-S6 Datasheet - Hynix

HMP112S6EFR6C-S6 200pin Unbuffered DDR2 SDRAM SO-DIMMs

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.3 / Dec. 2009 1 F r e e D a t a s h e e t h t t p : / 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED GRADE & KEY PARAMETERS C4 (DDR2.

HMP112S6EFR6C-S6 Features

* JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply

* All inputs and outputs are compatible with SSTL_1.8 interface

* Posted CAS Programmable CAS Latency 3,4,5, and 6 OCD (Off-Chip Driver Impedance Adjustment

HMP112S6EFR6C-S6 Datasheet (547.93 KB)