Datasheet Specifications
- Part number
- IW4027B
- Manufacturer
- IK Semiconductor
- File Size
- 216.32 KB
- Datasheet
- IW4027B_IKSemiconductor.pdf
- Description
- Dual J-K Flip-Flop
Description
TECHNICAL DATA IW4027B Dual JK Flip-Flop The IW4027B is a Dual JK Flip-Flop which is edge-triggered and .
Features
* independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performaApplications
* of any voltage higher than maximum rated voltages to this should be constrained to the range high-impedance circuit. For proper operation VIN GND≤VIN ≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e. g. , either GND or VCC). Unused outputs must be left open. 2 IW4027BIW4027B Distributors
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