IS43DR16128C, IS46DR82560C Datasheet - ISSI

IS43DR16128C DDR2 DRAM

ISSI's 2Gb DDR2 SDRAM uses a double-data-rate architecture to achieve high-speed operation. The double-data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls. ADDRESS TABLE Parameter 256M x 8 128M x.

IS43DR16128C Features

* Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V

* JEDEC standard 1.8V I/O (SSTL_18-compatible)

* Double data rate interface: two data transfers per clock cycle

* Differential data strobe (DQS, DQS)

* 4-bit prefetch architecture

* On chip DLL to align DQ and DQS

IS46DR82560C-ISSI.pdf

IS43DR16128C Datasheet Preview — This datasheet PDF includes multiple part numbers: IS43DR16128C, IS46DR82560C. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

IS43DR16128C, IS46DR82560C

Manufacturer:

ISSI

File Size:

1.53 MB

Description:

Ddr2 dram.

Note:

This datasheet PDF includes multiple part numbers: IS43DR16128C, IS46DR82560C.
Please refer to the document for exact specifications by model.

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TAGS

IS43DR16128C IS46DR82560C DDR2 DRAM ISSI

IS43DR16128C Distributor