IS61VF204836B
FEATURES
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and control
- Burst sequence control using MODE input
- Three chip enable option for simple depth expansion and address pipelining
- mon data inputs and data outputs
- Auto Power-down during deselect
- Single cycle deselect
- Snooze MODE for reduced-power standby
- JTAG Boundary Scan for PBGA package
- Power Supply LF: Vdd 3.3V (+ 5%), Vddq 3.3V/2.5V (+ 5%) VF: Vdd 2.5V (+ 5%), Vddq 2.5V (+ 5%) VVF: Vdd 1.8V (+ 5%), Vddq 1.8V (+ 5%)
- JEDEC 100-Pin TQFP, 119-pin PBGA, and 165pin PBGA packages
- Lead-free available ADVANCED INFORMATION OCTOBER 2012
DESCRIPTION
The 72Mb product family features
high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for munication and networking applications. The IS61LF/VF204836B is organized as 2,096,952 words by 36 bits. The IS61LF/VF409618B is...
