IS64LPS12832EC Datasheet - ISSI

IS64LPS12832EC SINGLE CYCLE DESELECT SRAM

IS64LPS12832EC Features

* Internal self-timed write cycle

* Individual Byte Write Control and Global Write

* Clock controlled, registered address, data and control

* Burst sequence control using MODE input

* Three chip enable option for simple depth expansion and address pipelining

* Common data inp

Datasheet Details

IS64LPS12832EC

ISSI

2.16 MB

Single cycle deselect sram.

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IS64LPS12832EC SINGLE CYCLE DESELECT SRAM ISSI

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