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41C16256 Datasheet - Integrated Circuit Solution

41C16256 IS41C16256

The ICSI IS41C16256 and IS41LV16256 is a 262,144 x 16bit high-performance CMOS Dynamic Random Access Memories. The IS41C16256 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 16-bit word..

41C16256 Features

* Extended Data-Out (EDO) Page Mode access cycle TTL compatible inputs and outputs; tristate I/O Refresh Interval: 512 cycles /8 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden

* Single power supply: 5V ± 10% (IS41C16256) 3.3V ± 10% (IS41LV16256)

* Byte Write and Byte Read oper

41C16256 Datasheet (256.39 KB)