41C16256 IS41C16256

Integrated Circuit Solution

Description

www.DataSheet4U.com IS41C16256 IS41LV16256 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE .
The ICSI IS41C16256 and IS41LV16256 is a 262,144 x 16bit high-performance CMOS Dynamic Random Access Memories.

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Datasheet Specifications

Part number: 41C16256
Manufacturer: Integrated Circuit Solution
File Size: 256.39 KB
Datasheet: 41C16256_IntegratedCircuitSolution.pdf
Description: IS41C16256

Features

* Extended Data-Out (EDO) Page Mode access cycle TTL compatible inputs and outputs; tristate I/O Refresh Interval: 512 cycles /8 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden
* Single power supply: 5V ± 10% (IS41C16256) 3.3V ± 10% (IS41LV16256)
* Byte Write and Byte Read oper

Applications

* The IS41C16256 is packaged in a 40-pin 400mil SOJ and 400mil TSOP-2. KEY TIMING PARAMETERS Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. EDO Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) -25(5V) 25 10 12 10 45 -35 35 10 1

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41C16256 IS41C16256 Integrated Circuit Solution

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