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PA7140 Programmable Electrically Erasable Logic Array

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Description

Commercial/ Industrial PA7140 PEELTM Array .
The PA7140 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology.

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Datasheet Specifications

Part number
PA7140
Manufacturer
Integrated Circuit Technology
File Size
309.28 KB
Datasheet
PA7140_IntegratedCircuitTechnology.pdf
Description
Programmable Electrically Erasable Logic Array

Features

* s Programmable Electrically Erasable Logic Array s Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches - Up to 72 logic cell output functions - PLA structure with true product-term sharing - Logic functions and registers can be I/O-buried High-Speed Commercial and Industr

Applications

* - Integration of multiple PLDs and random logic - Buried counters, complex state-machines - Comparators, decoders, other wide-gate functions CMOS Electrically Erasable Technology , - Reprogrammable in 40-pin DIP 44-pin PLCC, and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic

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