IS42S16128 Datasheet - Integrated Silicon

IS42S16128 - 128K words x 16 Bits x 2 Banks SDRAM

PIN DESCRIPTIONS A0-A9 A0-A8 A9 A0-A7 I/O0 to I/O15 CLK CKE CS RAS CAS WE LDQM UDQM Address Input Row Address Input Bank Select Address Column Address Input Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command Write Enable Lower Bye, Input/Out.

IS42S16128 Features

* Clock frequency: 125 MHz, 100 MHz, 83 MHz

* Two banks can be operated simultaneously and independently

* Single 3.3V power supply

* LVTTL interface

* Programmable burst length

* (1, 2, 4, 8, full page)

* Programmable burst sequence: Sequentia

IS42S16128_IntegratedSilicon.pdf