* JEDEC TO-252AA DRAIN (FLANGE) SOURCE DRAIN GATE
* Ultra Low On-Resistance - rDS(ON) = 0.049Ω, VGS = 10V - rDS(ON) = 0.056Ω, VGS = 5V
* Simulation Models - Temperature Compensated PSPICE® and SABER© Electrical Models - Spice and SABER© Thermal Impedance Models - www.Intersil.com
HUF76413D3S Datasheet (105.51 KB)
HUF76413D3S
Intersil Corporation
105.51 KB
N-channel mosfet.
HUF76413D3, HUF76413D3S
Data Sheet November 1999 File Number 4724.1
20A, 60V, 0.056 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging
JEDEC.
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