JMF662 Datasheet - JMicron

JMF662 SATA III to Flash controller

SATA II to Flash Controller Document 1 2 3 4 JMF662 Data Sheet JMF662 Design Specification JMF662 Hardware Design Guide JMF662 Hardware Schematic Contact Information Department Sales Tech.Support Email sales@jmicron.com fae@jmicron.com www.DataSheet.co.kr Version B.1.0 © JMicron 2012. All righ.

JMF662 JMF662 SATA III to Flash controller Overview JMF662 is a single chip, supports external SDRAM, SATA III to NAND flash interface. It is native design to provide higher bandwidth for flash memory access. JMF662 can support the maximum read and write speed to drive the limit of flash memory. JMF662 has the best supporting to the latest NAND flash memory, including Toshiba 32nm/24nm HBL/ABL Flash. It also provides the embedded hardware error correction code (ECC), wear leveling, and bad bloc.

JMF662 Features

* Compliance Compliant with Serial ATA International Organization: Serial ATA Revision 2.6. SATAIII Supports 1-port 1.5/3.0/6.0Gbps SATA I/II/III interface. CPU Embedded data buffer. 32bits Embedded processor. 32 KBytes Embedded masked program ROM. 128 KBytes Embedded system RAM. Flash Support maximum

JMF662 Datasheet (129.11 KB)