Description
JL7012F Datasheet
Table 2-1 JL7012F Pin Description
PIN
Name
Type
NO.Function
Other Function
GPIO
1
PB9
I/O
ADC9:ADC Input Channel 9;
(High Voltage Resistant)
2
PGND
G
The ground of Buck DC-DC converter;
3
SW
PO
Switch signal of the Buck converter,connected to inductor;
4
VBAT
P
Battery interface;
Charging power input;
UART0TXB:Uart0 Data Output(B);
VPWR
PI GPIO
5
UART0RXB:Uart0 Data Input(B);
(PP0)
(I/O) (High Voltage Resistant)
CAP1:Timer1 Capture;
PWM3:Tim
Features
- JL7012F Datasheet
CPU
32bit Dual-Core DSP Maximum speed 160MHz 32KB ICache and 16KB DCache IEEE754 Single precision FPU Mathematical accelerate engine Interrupts with 8 priority level
8kHz/11.025kHz/16kHz/22.05kHz/24kHz/32 kHz/44.1kHz/48kHz are supported Support four digital/analog MIC inputs Four channels analog audio inputs Audio DAC support differential cap-less mode or single-ended mode Direct drive 16ohm/32ohm Speaker loading
Memory
On-chip 640KB SRAM Support MMU Built-In Flash
Clocks
O.