ISPLSI5512VE Datasheet - Lattice Semiconductor

ISPLSI5512VE High Density PLD

The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Pool (GRP) between the GLBs. Swi.

ISPLSI5512VE Features

* Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE

* 3.3V Power Supply

* User Selectable 3.3V/2.5V I/O

* 24000 PLD Gates / 512 Macrocells

* Up to 256 I/O Pins

* 512 Registers

* High-Speed Global Interconnect

ISPLSI5512VE Datasheet (263.94 KB)

ISPLSI5512VE Datasheet Preview — Preview of ISPLSI5512VE PDF

Datasheet Details

Part number:

ISPLSI5512VE

Manufacturer:

Lattice Semiconductor

File Size:

263.94 KB

Description:

High density pld.

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ISPLSI5512VE High Density PLD Lattice Semiconductor

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