ISPPAC-CLK56xx In-System Programmable

Lattice Semiconductor

Description

ispClock 5600 Family ™ In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer November 2004 Preliminary Data Sheet .
and Overview The ispClock5610 and ispClock5620 are in-system-programmable high-fanout PLL-based clock drivers designed for use in high performance com.

📥 Download Datasheet

ISPPAC-CLK56xx Datasheet Preview — Preview of ISPPAC-CLK56xx PDF

Datasheet Specifications

Part number: ISPPAC-CLK56xx
Manufacturer: Lattice Semiconductor
File Size: 888.01 KB
Datasheet: ISPPAC-CLK56xx_LatticeSemiconductor.pdf
Description: In-System Programmable

Features

* 10MHz to 320MHz Input/Output Operation Low Output to Output Skew (

Applications

* Circuit board common clock generation and distribution
* PLL-based frequency generation
* High fan-out clock buffer
* Zero-delay clock buffer Product Family Block Diagram LOCK DETECT OUTPUT DIVIDERS BYPASS MUX
* V0 V1 V2 V3 V4 PLL CORE Internal/External Feedbac

ISPPAC-CLK56xx Distributors

📁 Related Datasheet

ISP0912 ISP091201 ISP1040B ISP1040C ISP1102 ISP1102BS

📌 All Tags

ISPPAC-CLK56xx In-System Programmable Lattice Semiconductor

Lattice Semiconductor ISPPAC-CLK56xx-like datasheet