LY6264 Datasheet (Lyontek) - 8K X 8 BIT LOW POWER CMOS SRAM

LY6264, 8K X 8 BIT LOW POWER CMOS SRAM

Initial Issue Revised Vcc Range 4.5~5.5V => 2.7~5.5V Revised ISB1 Adding PKG type : skinny P-DIP Revised VIH(min)=2.4V, VIL(max)=0.6V Revised VIH(min)=2.4V, VIL(max)=0.6V (VCC=2.7~3.6V) VIH(min)=2.4V, VIL(max)=0.8V (VCC=4.5~5.5V) Revised STSOP Package Outline Dimension Added SL grade Added ISB1/IDR

LY6264 Features

* & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Revised ISB1(MAX) Revised VTERM to VT1 and VT2 Revised Test Condition of ISB1/IDR Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Issue Date Jul.25.2004 May.3.2005 May.13.20