HMS30C7202N
description at any time without notice.
Change Log
Issue N-01 N-02 Date 2003/09/15 2004/06/17 By Injae Koo Injae Koo Change The First Release (Version 1.0) ADC/GPIO/SDRAMC/MMC/LCD/AC Characteristics (SMI)
© 2004 Magna Chip Semiconductor Ltd. All Rights Reserved.
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- Version 1.1
FEATURES
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- - 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes bined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with individual power-down: Multi-channel DMA 4 Timer Channels with Watch Dog Timer Intelligent Interrupt Controller Memory controller for ROM, Flash, SRAM, SDRAM Power management unit LCD Controller for mono/color STN and TFT LCD Real-time clock (32.768k Hz oscillator) Infrared munications (SIR support) 4 UARTs (16C550 patible) PS/2 External Keyboard / Mouse interface 2 Pulse-Width-Modulated (PWM) interface Matrix Keyboard control interface (8- 8) GPIO...
