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HMS30C7202N Datasheet - MagnaChip Semiconductor

HMS30C7202N 32-Bit MPU

HMS30C7202N Highly-integrated MPU (ARM Based 32-Bit Microprocessor) Datasheet Version 1.1 MagnaChip Semiconductor Ltd. HMS30C7202N © 2004 MagnaChip Semiconductor Ltd. All Rights Reserved. - ii - Version 1.1 HMS30C7202N Copyright. 2004 MagnaChip Semiconductor Ltd. ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, microfilm, retrieval system, or by any other means now known or hereafter invented without the prior written permission of MagnaChip Semico.

HMS30C7202N Features

* 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes combined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with individ

HMS30C7202N Datasheet (2.09 MB)