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MAX9121 Quad LVDS Line Receivers

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Description

19-1909; Rev 0; 6/01 Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout General .
The MAX9121/MAX9122 quad low-voltage differential signaling (LVDS) differential line receivers are ideal for applications requiring high data rates, l.

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Features

* integrated parallel termination resistors (nominally 107Ω), which eliminate the requirement for four discrete termination resistors and reduce stub lengths. The MAX9121 inputs are high impedance and require an external termination resistor when used in a point-to-point connection. The devices suppor

Applications

* requiring high data rates, low power, and low noise. The MAX9121/MAX9122 are guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlledimpedance media of approximately 100Ω. The transmission media may be printed circuit (PC) board traces or www. DataSheet4U. com cables. The MAX9121/MA

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