PL500-15 - Low Phase Noise VCXO
The PL500-15/16 is a low cost, high performance and low phase noise VCXO for the 1MHz to 18MHz range, providing less than -130dBc at 10kHz offset when using a 35.328MHz crystal.
The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequen
FE AT UR E S PL500-15/16 Low Phase Noise VCXO (1MHz to 18MHz) PIN CONFIGURATION VCXO with Divider Selection (DIVSEL) input pin PL500-15: ÷8, ÷16 PL500-16: ÷2, ÷4 VCXO output for the 1MHz to 18MHz range 16MHz to 36MHz fundamental crystal input.
Low phase noise (-130 dBc @ 10kHz offset using a 35.328MHz crystal).
LVCMOS output with OE tri-state control.
Integrated high linearity variable capacitors.
12mA drive capability at TTL output.
