SY100E104
FEATURES s 600ps max. propagation delay s Extended 100E VEE range of
- 4.2V to
- 5.5V s True and plementary outputs s OR/NOR function outputs s Fully patible with Industry standard 10KH,
100K I/O levels s Internal 75KΩ input pulldown resistors s Fully patible with Motorola MC10E/100E104 s Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E104 are quint 2-input AND/NAND gates designed for use in new, high-performance ECL systems. The E104 also features a function output, F, which is the OR of all five AND gate outputs, while F is the NOR. Both true and plementary outputs are provided.
BLOCK DIAGRAM
D0a D0b D1a D1b D2a D2b D3a D3b D4a D4b
PIN NAMES
F Pin
Function
Dna, Dnb
Data Inputs
Q0-Q4
AND Outputs
Q0-Q4
NAND Outputs
Q0 F
OR Output
Q0 F
NOR Output
VCCO
VCC to Output
Q1
Q1
Q2 Q2
Q3 Q3
Q4 Q4
M9999-032006 hbwhelp@micrel. or (408) 955-1690
Rev.: H Amendment: /0 Issue Date: March 2006
Micrel, Inc.
SY10E104 SY100E104
PACKAGE/ORDERING INFORMATION
28-Pin...
