SY100E111 - 1:9 DIFFERENTIAL CLOCK DRIVER
The SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distribution in new, highperformance ECL systems.
They accept one differential or single-ended input, with VBB used for single-ended operation.
The signal is fanned out to nine identical differential outputs.
An enable inpu
SY100E111 Features
* s Low skew s Extended 100E VEE range of
* 4.2V to
* 5.5V s Guaranteed skew limits s Differential design s VBB output s Enable input s Fully compatible with industry standard 10KH, 100K I/O levels s 75KΩ input pulldown resistors s Fully compatible with ON Semiconductor MC10E/100E111 s A
