SY100E131
FEATURES s 1100MHz min. toggle frequency s Extended 100E VEE range of
- 4.2V to
- 5.5V s Differential output s Individual and mon clocks s Indivldual asynchronous reset s Paired asynchronous sets s Fully patible with Industry standard 10KH,
100K ECL levels s Internal 75KΩ input pulldown resistors s Fully patible with Motorola MC10E/100E131 s Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E131 are high-speed quad master slave D-type flip-flops with differential outputs designed for use in new, high-performance ECL systems. The flip-flops may be individually clocked by holding CC (mon Clock) at a logic LOW and then using the four individual CE (Clock Enable CE0- CE3) inputs to acplish such clocking. Alternatively, all four flip-flops can be clocked in mon by holding the CE inputs LOW and then using CC to clock the data. In the mon clock mode, the CE input acts as a control that passes the CC signal to the flip-flop. Data is clocked into the flip-flop on the rising edge of the...
