SY100E143
FEATURES s 700MHz min. operating frequency s Extended 100E VEE range of
- 4.2V to
- 5.5V s 9 bits wide for byte-parity applications s Asynchronous Master Reset s Dual clocks s Fully patible with industry standard 10KH,
100K ECL levels s Internal 75kΩ input pulldown resistors s Fully patible with Motorola MC10E/100E143 s Available in 28-pin PLCC package
BLOCK DIAGRAM
D MUX D0 R
D1 MUX
D MUX D2 R
MUX D3
D4 MUX
MUX D5
D6 MUX
D7 MUX
D8
SEL CLK1 CLK2
M9999-032006 hbwhelp@micrel. or (408) 955-1690
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
DESCRIPTION
The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data.
The SEL (Select) control pin serves to determine the mode of operation; either HOLD or LOAD. The input data has to meet the set-up time before being clocked into the nine input registers on the...
