SY10E160 Datasheet | Micrel Semiconductor

FEATURES s Provides odd-HIGH parity of 12 inputs s Extended 100E VEE range of - 4.2V to - 5.5V s s s s s s Output register with Shift/Hold capability 900ps max. D to Q, /Q output Enable control Asynchronous Register Reset Differential outputs Fully patible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully patible with Motorola MC10E/100E160 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E160 are high-speed, 12-bit parity generator/checkers with differential outputs, for use in new, high-performance ECL systems. The output Q takes on a logic HIGH value only when an odd number of inputs are at a logic HIGH. A logic HIGH on the enable input (EN) forces the output Q to a logic LOW. An additional feature of the E160 is the output register. Two multiplexers and their associated signals control the register input by providing the option of holding present data, loading the new parity data or shifting external data in. To hold the present...