SY10E451
FEATURES s 1100MHz min. toggle frequency s Extended 100E VEE range of
- 4.2V to
- 5.5V s Differential inputs: data and clock s VBB output for single-ended use s Asynchronous Master Reset s Fully patible with industry standard 10KH,
100K ECL levels s Internal 75KΩ input pulldown resistors s Fully patible with Motorola MC10E/100E451 s Available in 28-pin PLCC package
BLOCK DIAGRAM
D0 /D0
D1 /D1
D2 /D2
D3 /D3
D4 /D4
D5 /D5
CLK /CLK
MR VBB
D Q0 R
D Q1 R
D Q2 R
D Q3 R
D Q4 R
D Q5 R
DESCRIPTION
The SY10/100E451 offer six D-type flip-flops with singleended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems. The registers are triggered by the rising edge of the CLK input.
A logic HIGH on the Master Reset (MR) input resets all outputs to a logic LOW. The VBB output is provided for use as a reference voltage for single-ended reception of ECL signals to that device only. When used for this purpose, it is remended that VBB is decoupled to VCC...
