Description
9
2 Overview 10
3 General Information 12
3.1 Resources 12 3.2 Code Examples 12 3.3 Capacitive Touch Sensing 12 3.4 Data Retention 12 3.5 Disclaimer 12
4 CPU Core 13
4.1 Architectural Overview 13 4.2 ALU.
Arithmetic Logic Unit 14 4.3 Status Register 14 4.4 General Purpose Register File 14 4.5 Stack Pointer 16 4.6 Instruction Execution Timing 16 4.7 Reset and Interrupt Handling 17 4.8 Register Description 19
5 Memories 21
5.1 In-System Re-programmable Flash Program Memory 21.
Features
- High Performance, Low Power AVR® 8-bit Microcontroller.
- Advanced RISC Architecture.
- 120 Powerful Instructions.
- Most Single Clock Cycle Execution.
- 32 x 8 General Purpose Working Registers.
- Fully Static Operation.
- High Endurance, Non-volatile Memory Segments.
- 2K/4K/8K Bytes of In-System, Self-programmable Flash Program Memory.
- Endurance: 10,000 Write/Erase Cycles.
- 128/256/512 Bytes of In-System Programmable.
