PIC16F13123 Overview
PIC16F13145 Family Full-Featured 8/14/20-Pin Microcontrollers PIC16F13145 Family Introduction The PIC16F13145 microcontroller family, with its focused set of peripherals, provides an effective method to implement hardware-based solutions. This device family introduces the Configurable Logic Block (CLB) peripheral, enabling users to incorporate hardware-based custom logic into their applications. The CLB is prised of...
PIC16F13123 Key Features
- C piler Optimized RISC Architecture
- Operating Speed
- DC-32 MHz clock input
- 125 ns minimum instruction time
- 16-Level Deep Hardware Stack
- Low-Current Power-on Reset (POR)
- Configurable Power-up Timer (PWRT)
- Brown-out Reset (BOR)
- Low-Power Brown-out Reset (LPBOR)
- Windowed Watchdog Timer (WWD