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TP5322 P-Channel Vertical DMOS FET

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Description

TP5322 P-Channel Enhancement-Mode Vertical DMOS FET .
The TP5322 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing proces.

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Features

* 2.4V Maximum Low Threshold
* High Input Impedance
* 110 pF Maximum Low Input Capacitance
* Fast Switching Speeds
* Low On-Resistance
* Free from Secondary Breakdown

Applications

* Logic-Level Interfaces (Ideal for TTL and CMOS)
* Battery-Operated Systems
* Photovoltaic Drives
* Analog Switches
* General Purpose Line Drivers

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