46V16M16 - MT46V16M16

Micron Technology

Datasheet Details

BALL / PIN NUMBERS FBGA TSOP G2, G3 45, 46 SYMBOL CK, CK# TYPE Input DESCRIPTION Clock: CK and CK# are differential clock inputs.

167 MHz Clock, 333 Mb/s/p data rate.
VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V.
Bidirectional data strobe (DQS) transmitted/ received with data, i. e. , source-synchronous data capture (x16 has two - one per byte).
Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle.
Differential clock inputs (CK and CK#).
Commands entered on each positive CK edge.
DQS edge-aligned with data for READs; centeraligned.

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Published: Jan 25, 2010 |