MT60B4G4
Features
16Gb DDR5 SDRAM Addendum
MT60B4G4, MT60B2G8, MT60B1G16 Die Revision A
Features
This document describes the product specifications that are unique to Micron 16Gb DDR5 Die Revision A device. For general Micron DDR5 SDRAM specifications, see the Micron DDR5 SDRAM Core Product Data Sheet. Content in this 16Gb Die Revision A DDR5 SDRAM data sheet addendum supersedes content defined in the core data sheet.
- VDD = VDDQ = 1.1V (NOM)
- VPP= 1.8V (NOM)
- On-die, internal, adjustable VREF generation for DQ,
CA, CS
- 1.1V pseudo open-drain I/O
- TC maximum up to 95°C
- 32ms, 8192-cycle refresh up to 85°C
- 16ms, 8192-cycle refresh at >85°C to 95°C
- 32 internal banks (x4, x8): 8 groups of 4 banks each
- 16 internal banks (x16): 4 groups of 4 banks each
- 16n-bit prefetch architecture
- 1 cycle/2 cycle mand structure
- 2N mode
- All bank and same bank refresh
- Multi-purpose mand (MPC)
- CS/CA training mode
- On-die ECC (bounded fault)
- ECC transparency and error scrub
- Decision...
