MT62F1G64D8
Features
LPDDR5 SDRAM
MT62F512M32D2, MT62F1G32D4, MT62F2G32D8, MT62F512M64D4, MT62F1G64D8
Features
- Architecture
- 12.8 GB/s maximum bandwidth per channel
- Frequency range: 800- 5 MHz (data rate range per pin: 6400- 40 Mb/s with WCK:CK = 4:1)
- Selectable CKR (WCK:CK = 2:1 or 4:1)
- LPDDR5 data interface
- Single x16 channel/die
- Double-data-rate mand/address entry
- Differential mand clocks (CK_t/CK_c) for high-speed operation
- Differential data clocks (WCK_t/WCK_c)
- Optional differential read strobe (RDQS_t/RDQS_c)
- 16n-bit or 32n-bit prefetch architecture
- 4KB page size with 8-bank (8B mode), 2KB page size with bank group (BG mode), or 16-bank (16B mode) operation
- mand-selectable burst lengths (BL = 16 or 32) in bank group or 16-bank modes
- Background ZQ calibration/mand-based ZQ calibration
- Optional link protection (link ECC)
- Partial-array self refresh (PASR) and partial-array auto refresh (PAAR) with segment mask
- Ultra-low-voltage core and I/O power supplies
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