Description
Revision 11 ProASIC3 nano Flash FPGAs .
Features
* Wide Range of Features
* 10 k to 250 k System Gates
* Up to 36 kbits of True Dual-Port SRAM
* Up to 71 User I/Os
Advanced I/Os
* 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
* Bank-Selectable I/O Voltages
* up to 4 Banks per Chip
* Sin
Applications
* markings, such as the I designator for Industrial Devices or the ES designator for Engineering Samples. Figure 1 on page 1-IV shows an example of device marking based on the AGL030V5-UCG81.
R ev i si o n 1 1
III
The actual mark will vary by the device/package combination ordered. Device Name (si