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EDI88512C 512Kx8 Monolithic SRAM

EDI88512C Description

EDI88512C 512Kx8 Monolithic SRAM, CMOS .
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power (+5V ±10%) Ground Not Connected A0-18 WE# CS# OE# BLOCK DIAGRAM M.

EDI88512C Features

*  512Kx8 bit CMOS Static
*  Random Access Memory
* Access Times of 70, 85, 100ns
* Data Retention Function (LP version)
* TTL Compatible Inputs and Outputs
* Fully Static, No Clocks
*  32 lead JEDEC Approved Evolutionary Pinout
* Ceramic Sidebraze

EDI88512C Applications

* Military product is available compliant to Appendix A of MIL-PRF-38535.
* This product is subject to change without notice. FIGURE 1
* PIN CONFIGURATION 32 PIN TOP VIEW A18 1 A16 2 A14 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 Vss 16 32 pin Evolution

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512Kx8 Monolithic SRAM Microsemi
Microsemi EDI88512C-like datasheet