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ZL30255 - Multiplier and Jitter Attenuator

ZL30255 Description

Register Map: Section 6.2 .
8 5.

ZL30255 Features

* Two Independent Channels
* Three Input Clocks Per Channel
* Three inputs, two differential/CMOS, one CMOS
* Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
* Inputs continually monitored for activity and frequency accuracy
* Automa

ZL30255 Applications

* Telecom OTN and SONET/SDH/SyncE cards
* Frequency conversion and jitter attenuation in a wide variety of equipment types APLL HSDIV1 DIV1 ~3.7 to 4.2GHz, Fractional-N DIV2 Figure 11 HSDIV2 DIV3 Microprocessor Port (SPI or I2C Serial) and HW Control and Status Pins OC1P, O

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Multiplier and Jitter Attenuator Microsemi
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