M5M4V4S40CTP-15, M5M - 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM

Mitsubishi

Datasheet Details

Part number	M5M4V4S40CTP-15, M5M
Manufacturer	Mitsubishi
File Size	1.42 MB
Description	4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
Datasheet	M5M-4V4.pdf
Note	This datasheet PDF includes multiple part numbers: M5M4V4S40CTP-15, M5M. Please refer to the document for exact specifications by model.

The M5M4V4S40CTP is a 2-bank x 131,072-word x 16-bit Synchronous DRAM, with LVTTL interface.

- Single 3.3v±0.3v power supply - Clock frequency 83MHz / 67MHz - Fully synchronous operation referenced to clock rising edge - Dual bank operation controlled by BA(Bank Address) - /CAS latency- 1/2/3 (programmable) - Burst length- 1/2/4/8/FP (programmable) - Sequential and interleave burst (programmable) - Byte control by DQMU and DQML - Random column access - Auto precharge / All bank precharge controlled by A8 - Auto and self refresh - 1024 refresh cycles /16.4ms CLK - LVTTL Interface CKE - 4.

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Published: Apr 26, 2005 |