* Single 2.7 ~ 3.6V power supply
* No clocks, No refresh
* All inputs and outputs are TTL compatible.
* Easy memory expansion and power down by S1 & S2
* Data retention supply voltage=2.0V
* Three-state outputs: OR-tie capability
* OE prevents
M5M5V208AKR Datasheet (90.48 KB)
M5M5V208AKR
Mitsubishi
90.48 KB
2097152-bit (262144-word by 8-bit) cmos static ram.
Revision-A0.2E
29.Jan.'99
MITSUBISHI LSIs
M5M5V208AKV/KR
PRELIMINARY
Notice: This is not a final specification. Some parametric limits are subject.
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