* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 167 MHz
* Fast access time: 3.8 ns
* Single 3.3V -5% and +5% power supply VDD
* Separate VDDQ for 3.3V or 2.5V I/O
* Individual byte write (BWa# - BWd#) controls may be t
M5M5V5636GP16 Datasheet (262.21 KB)
M5M5V5636GP16
Mitsubishi
262.21 KB
18874368-bit(524288-word by 36-bit) network sram.
2001.July Rev.0.1
MITSUBISHI LSIs
Advanced Information
Notice: This is not final specification. Some parametric limits are subject to change.
M5M5V.
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