S40B - 64M bit Synchronous DRAM

Mitsubishi Electric Semiconductor

S40B Datasheet Preview — Preview of S40B PDF

Datasheet Details

Part number	S40B
Manufacturer	Mitsubishi Electric Semiconductor
File Size	655.47 KB
Description	64M bit Synchronous DRAM
Datasheet	S40B_MitsubishiElectricSemiconductor.pdf

S40B Product details

Description

M2V64S20BTP is organized as 4-bank x4,194,304-word x 4-bit,and M2V64S30BTP is organized as 4-bank x 2097152-word x 8-bit ,and M2V64S40BTP is organized as 4-bank x 1048576-word x 16-bit Synchronous DRAM with LVTTL interface.

Features

ITEM tCLK tRAS tRCD tAC tRC Icc1 Icc6 Clock Cycle Time (Min. ) (Min. ) (Min. ) (Max. ) (CL=3) (Min. ) M2V64S20TP M2V64S30TP M2V64S40TP -6 7.5ns 45ns 20.0ns 5.4ns 67.5ns 120mA (Max. ) 1mA Active to Precharge Command Period Row to Column Delay Access Time from CLK Ref/Active Command Period Operation Current (Max. ) [Single Bank] Self Refresh Current - Single 3.3V ±0.3V power supply - Max. Clock frequency -6 : 133MHz [PC133 ] - Fully synchronous operation referenced to clock rising edge - 4-bank.

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Published: Apr 7, 2005 |