V53C516405A Datasheet (Mosel Vitelic Corp) - 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

V53C516405A, 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM

The V53C516405A is a 4,194,304 x 4 bit highperformance CMOS dynamic random access memory.

The V53C516405A offers Page mode operation with Extended Data Output.

The V53C516405A has a symmetric address, 12-bit row and 10-bit column.

All inputs are TTL compatible.

EDO Page Mode operation allows random

V53C516405A Features

* s 4M x 4-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh s Refresh Interval: 4096 cycles/64 ms s Available in 24/26-pin 300 mil SOJ, and 24/26-p