SN54LS323 Datasheet - Motorola Inc

SN54LS323 8-BIT SHIFT/STORAGE REGISTER

SN54/74LS323 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The SN54 / 74LS323 is an 8-Bit Universal Shift / Storage Register with 3-state outputs. Its function is similar to the SN54 / 74LS299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are multiplexed to minimize pin count. Separate inputs and outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. Four operation modes are possible: hold (store), shift left, shift right, and parallel lo.

SN54LS323 Features

* are described below: 1. They use eight D-type edge-triggered flip-flops that respond only to the LOW-to-HIGH transition of the Clock (CP). The only timing restriction, therefore, is that the mode control (S0, S1) and data inputs (DS0, DS7, I/O0

* I/O7) may be stable at least a setup time prior

SN54LS323_MotorolaInc.pdf