SN54LS569A Datasheet (Motorola Inc) - FOUR-BIT UP/DOWN COUNTER

SN54LS569A, FOUR-BIT UP/DOWN COUNTER

SN54/74LS569A FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS The SN54 / 74LS569A is designed as programmable up/down BCD and Binary counters respectively.

These devices have 3-state outputs for use in bus organized systems.

With the exception of output enable (OE) and asynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP).

When the LOAD input is LOW, the outputs will be programmed by the parallel data inputs (A, B, C, D) on the next clock edge.

Enabling of

SN54LS569A Features

* 7.62 BSC 0 ° 15 ° 0.300 BSC 0 ° 15 ° 0.51 1.01 0.020 0.040 FAST AND LS TTL DATA 5-579 Motoro