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MC88916DW Datasheet - Motorola

MC88916DW LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET

of the RST_IN/RST_OUT(LOCK) Functionality The RST_IN and RST_OUT(LOCK) pins provide a 68030/040 processor reset function, with the RST_OUT pin also acting as a lock indicator. If the RST_IN pin is held high during system power *up, the RST_OUT pin will be in the low state until steady state p.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Low Skew CMOS PLL Clock Driver With Processor Reset The MC88916 Clock Driver utilizes phase locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The RST_IN/RST_OUT(LOCK) pins provide a processor reset function designed specifically for the MC68/EC/LC030/04.

MC88916DW Features

* z 1. Maximum Operating Frequency is guaranteed with the 88916 in a phase

* locked condition, and all outputs loaded at 50Ω terminated to VCC/2. MOTOROLA 4 TIMING SOLUTIONS BR1333

* REV 5 MC88916 AC CHARACTERISTICS (TA =

* 40°C to +85°C; VCC = 5.

MC88916DW Datasheet (114.05 KB)

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Datasheet Details

Part number:

MC88916DW

Manufacturer:

Motorola

File Size:

114.05 KB

Description:

Low skew cmos pll clock driver with processor reset.

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MC88916DW LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET Motorola

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