* ns 5, 6, 7 5, 6, 7 Notes 4 NOTES: 1. A write occurs during the overlap of E low and W low. 2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus contention conditions during read and write cycles. 3. If G goes low
MCM6229BB Datasheet (125.99 KB)
MCM6229BB
Motorola
125.99 KB
256k x 4 bit static random access memory.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MCM6229BB/D
Product Preview
MCM6229BB
XJ PACKAGE 400 MIL SOJ CASE 810
*03
256.
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