SN54LS378 Datasheet - Motorola

SN54LS378 OCTAL D FLIP-FLOP

OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54 / 74LS378 is a 6-Bit Register with a buffered common enable. This device is similar to the SN54 / 74LS174, but with common Enable rather than common Master Reset. The SN54 / 74LS379 is a 4-Bit R.

SN54LS378 Features

* the common Enable rather then common Master Reset.

* 8-Bit High Speed Parallel Registers

* Positive Edge-Triggered D-Type Flip Flops

* Fully Buffered Common Clock and Enable Inputs

* True and Complement Outputs

* Input Clamp Diodes Limit High Speed Termination

SN54LS378 Datasheet (250.77 KB)