* the common Enable rather then common Master Reset.
* 8-Bit High Speed Parallel Registers
* Positive Edge-Triggered D-Type Flip Flops
* Fully Buffered Common Clock and Enable Inputs
* True and Complement Outputs
* Input Clamp Diodes Limit High Speed Termination
SN54LS378 Datasheet (250.77 KB)
SN54LS378
Motorola
250.77 KB
Octal d flip-flop.
OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced.
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