* VCO is incorporated.
* Horizontal and vertical sync separation circuits are incorporated (with output pins).
* Horizontal and vertical sync output pulses (TTL level)
* ACC amplifier and killer detector circuits are incorporated.
* 1/4 and 1/8 (1/2 × 1/4) fre
UPC1862
NEC
252.32 KB
Burst lock clock generator.
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC1862
BURST LOCK CLOCK GENERATOR
The µPC1862 is an LSI incorporating a PLL circuit to generate nfSC .
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