UPD1723GF-013, UPD Datasheet - NEC

UPD1723GF-013 PLL FREQUENCY SYNTHESIZER AND CONTROLLER

PIN No. SYMBOL PIN NAME No connection DESCRIPTION This pin is not connected to the internal chip. Therefore, leave it open or connect it to GND, VDD, etc. PLL (Phase Locked Loop) error output pins. When the frequency obtained by dividing the local oscillation frequency (VCO output) is higher than t.

DATA SHEET MOS INTEGRATED CIRCUIT µPD1723GF-013, µPD1723GF-213 PLL FREQUENCY SYNTHESIZER AND CONTROLLER FOR FM/MW/LF TUNER (CAR AUDIO) The µPD1723GF-013 and µPD1723GF-213 are CMOS LSI developed for worldwide PLL frequency synthesizer FM/MW/LW tuner use. Their package is a 64-pin QFP. On-chip PLL frequency synthesizer, controller, 200 MHz prescaler, LCD driver, and IF counter allow the construction of a compact FM/MW/LW tuner with a high-performance clock for highend car stereo and home stereo s.

UPD1723GF-013 Features

* Worldwide FM/MW banks and European LW band can be received.

* Abundant tuning functions, including manual tuning, autotuning (seek, scan), and preset memory scan

* Six buttons, independent preset memories for 18 FM stations (FM1, FM2, FM3; 6 stations each), 12 MW stations (

UPD-1723.pdf