* 1.8 ± 0.1 V power supply
* 165-pin PLASTIC BGA package (13 x 15)
* HSTL Interface
* DLL circuitry for wide output data valid window and future frequency scaling
* Pipelined double data rate operation
* Common data input/output bus
* Two-tick
UPD44324082 Datasheet (419.48 KB)
UPD44324082
NEC
419.48 KB
(upd44324xx2) 36m-bit ddrii sram 2-word burst operation.
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD44324082, 44324092, 44324182, 44324362
36M-BIT DDRII SRAM 2-WORD BURST OPERATION
Descript.
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