* Fully synchronous operation
* HSTL Input / Output levels 5
* Fast clock access time : 3.8 ns (133 MHz)
* Asynchronous output enable control : /G
* Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)
* Common I/O using thr
UPD4443362 Datasheet (113.77 KB)
UPD4443362
NEC
113.77 KB
4m-bit cmos synchronous fast static ram 128k-word by 36-bit hstl interface.
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4443362
4M-BIT CMOS SYNCHRONOUS FAST STATIC RAM 128K-WORD BY 36-BIT HSTL INTERFACE / REGISTER-REGISTER / LATE .
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