74ABT273A Datasheet - NXP

74ABT273A Octal D-type flip-flop

The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before th.

74ABT273A Features

* Eight edge-triggered D-type flip-flops

* Buffered common clock

* Buffered asynchronous Master Reset

* Power-up reset

* See 74ABT377 for clock enable version

* See 74ABT373 for transparent latch version

* See 74ABT374 for 3-State version

74ABT273A Datasheet (104.15 KB)