74AHCT257 Datasheet (NXP) - Quad 2-input multiplexer

74AHCT257, Quad 2-input multiplexer

The 74AHC/AHCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7A.

The 74AHC/AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of QUICK REFERENCE DATA G

74AHCT257 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V

* Balanced propagation delays

* All inputs have Schmitt-trigger actions

* Non-inverting data path

* Inputs accept voltages higher than