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74ALS112A Datasheet - NXP

74ALS112A - Dual J-K negative edge-triggered flip-flop

74ALS112A Features

* individual J, K, clock (CPn), set (SD), and reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the function table regardless of the level at the other inputs. A High level on the clock (CPn) input enables the J and K inpu

74ALS112A_PhilipsSemiconductors.pdf

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Datasheet Details

Part number:

74ALS112A

Manufacturer:

NXP ↗

File Size:

92.64 KB

Description:

Dual j-k negative edge-triggered flip-flop.

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